From: Brian Atkins (firstname.lastname@example.org)
Date: Tue Jun 26 2001 - 21:44:53 MDT
Carl Feynman wrote:
> Brian Atkins wrote:
> > My (limited) understanding is that the
> > clock signal is transported through a chip layout in order to "trigger"
> > the transistors to switch.
> Not every transistor has a clock input. Typically there are between four
> and ten unclocked transistors in series, and then a "latch", which is a
> pair of transistors that switch synchronously with the clock. It is up to
> the chip architect to decide how many transistors there are between
> latches, and then the logic of the chip has to be designed to fit that
> constraint. If you want to be fancy, the architect can decide that part of
> the chip will have 10 transistors between latches, and run at 1 GHz, and
> part will have five transistors between stages, and run at 2 GHz.
> > According to what you are saying it would
> > mean there would be only one possible clock speed for a given chip
> > design. i.e. if you have 10ghz transistors and parts of the chip use
> > 10 transistors in series, then the chip is sold as a 1ghz part.
> This is exactly what happens.
Well that sounds like a completely asynchronous design. The point I'm
getting at is the clock can be modified...
> > This
> > clearly isn't the case since chips are sold in a wide range of speeds.
> I'm puzzled by what you mean here. Let me take a stab at it...
> Some Pentiums are fast, some Pentiums are slow, but this is because they
> are manufactured using different processes, and in some cases, using
> different logic designs. From an engineering point of view, they are not
> "one chip sold in a wide range of speeds." They are different chips, that
> are all labeled "the same" by the marketing department.
I disagree here. I know that there is a "natural" variation in the max
clock speed achievable for a set of "identical" chips that come off of
a wafer. The manufacturers test them and do a "bin split" where all of
the chips capable of a specific speed grade are sorted together. For
instance, the current AMD Athlon 4 chip produced in Germany on their
copper process might have a "sweet spot" of 1.4ghz, but off a given
wafer you may have some chips that can operate up to 1.8ghz, and some
that only work at 1.2ghz and below. This is due simply to errors and
flaws in the manufacturing process. AMD marks them all according to
what they can handle, and may even mark some of them lower if there is
currently big demand for a lower speed grade.
> You can make a chip run faster by upping the input voltage, as you say, and
> also by cooling it. But these modifications typically produce less than a
> 50% gain, and aren't what account for the speed differences between
> different versions of the "same chip". Changes in voltage and temperature
> give the engineers that designed the chip the heebie-jeebies, and are not a
> robust way of improving performance.
> > I think that the chip can be configured to run the clock lines at a
> > wide variety of speeds, and the only limitations come in from the fact
> > that the transistors may require higher voltage levels to be able to
> > switch quickly enough. Higher voltages eventually run you into heat
> > dissipation and other problems, putting an upper limit on how fast a
> > given chip design/substrate combo can operate.
> Actually, chips are usually run near their maximum tolerable voltage. The
> limit is set by various kinds of short-circuts being induced by electrons
> arcing across a gap or tunneling through an insulator. Heat disspation is
> a problem for the packaging engineer. At the high end, we're not pushing
> the limits of cooling technology.
Hmm, well I've read about Pentium 4 "hotspots" that are already causing
thermal throttling problems in real world benchmarks... Some of these
CPUs are putting out over 75 watts. But that is not the high end :-)
Anyway, what I was saying was simply that the CPU manufacturers can
"lock" the CPU clock to operate only at a given frequency. Intel has
done this in the past to try and defeat overclockers.
So can we sum up: what are the factors that limit the max clockspeed of
a given chip design? transistor switching speed is only one apparently
minor factor. If we already have transistors in .18 processes that can
switch at over 100ghz speeds, why are our CPU designs limited to speeds
under 2ghz? Will clockless designs allow higher speeds and better
> I designed chips for supercomputers from '84 to '92, so what I say above is
> nine years out of date. But I don't think much has changed.
Thanks for the details!
-- Brian Atkins Director, Singularity Institute for Artificial Intelligence http://www.intelligence.org/
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